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PNX0161
PNX0161 personal audio IC
Rev. 01 -- 17 January 2008 Product data sheet
1. Introduction
The Nexperia PNX0161 is an integrated IC that serves as USB audio and HID class device for a USB headset.
2. General description
Recent development in mobile phones is to have the phone equipped with a USB micro A plug as a single plug for charging and connection to all enhancements (like a headset, but also for other enhancements like GPS accessories etc.) The PNX0161 is based on an ARM7TDMI CPU core with data/instruction cache of 8 kB and USB 2.0 FS device interface.
3. Features
3.1 General features
I I I I Enables one chip solution for USB headset. Requires very low power. Supports FM radio input including low-power audio bypass mode. Is available in a small footprint package TFBGA88 of 7 x 7 sq. mm with 0.5 mm pitch.
3.2 Hardware features
I I I I I I I I I I ARM7TDMI processor core with 8 kB data/instruction cache. Embedded SRAM, 32 kB. Embedded ROM memory for storing the boot code, 32 kB. Embedded flash memory for storing the program code, 256 kB (second production version will be ROM based). Integrated USB 2.0 full-speed device interface. Intelligent configuration power management. Embedded high-efficiency power supply unit powered from a USB supply. Supports power optimization by optimizing supply voltages. Embedded DMA controller. Digital interfaces: N Integrated stereo ADC with programmable amplifier (microphone, line input and tuner input). N Integrated IIS input and output interfaces (configurable for master/slave options). N Integrated fast UART with DMA support.
NXP Semiconductors
PNX0161
PNX0161 personal audio IC
I
I I I I
N Integrated master/slave I2C interface. Analog interfaces: N Integrated stereo ADC with programmable amplifier (microphone, line input and tuner input). N Microphone bias block. N Integrated stereo DAC with Class-AB headphone amplifier for high quality audio with increased driving capabilities and for use in tuner applications. N The integrated ADC and DAC both have a 24 bits data path. Two integrated general purpose timers. Integrated watchdog timer. Low-power tuner mode with direct connection between tuner input and Class-AB headphone amplifier with analog volume control. JTAG interface with boundary scan and ARM debug access.
3.3 Software features
This section lists the software features that the PNX0161 is capable of performing. I Playback: playback by the headphones of a received USB audio stream from the USB host via the DAC. I Recording: audio stream converted by the ADC from the microphone is sent via the USB audio stream to the USB host. I Phone call: in addition to the first case, simultaneously returning a USB audio stream that is converted by the ADC from the microphone. The microphone is mixed to the headphone stream, known as side-tone mixing. I Tuner listening: the FM tuner audio stream is sent to the headphones. No stream is sent or received via USB. I Tuner recording: the FM tuner audio stream is sent to the headphones. In addition the FM tuner stream is streamed to the phone via USB. I USB HID class for FM tuner RDS info. I USB device firmware upgrade. I Intelligent power management software. I Audio postprocessing features like volume control.
3.4 Software features on request
This section lists the software features that the PNX0161 is capable of performing. I Audio source selection between line-in and USB audio in for playback path, by toggling GPIO pin. I Support for stereo recording from analog and I2S inputs at sample rates other than 48 kHz. I Support for stereo playback from USB audio, I2S and analog inputs at sample rates other than 48 kHz. I Option for a "direct analog link" for playback applications where only volume control is performed in the PNX0161. The "direct analog link" provides a full analog audio path through the PNX0161 from the analog stereo line input to the low output impedance buffer output through an analog volume control block. When the option is not selected, the analog stereo input is converted to the digital domain by the on-chip ADC. Audio
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PNX0161 personal audio IC
postprocessing is performed in the digital domain. The processed signals are then converted back to analog by the on-chip DAC and fed to the analog outputs through the low impedance output buffer. I Digital EQ for loudspeaker characteristics compensation. I For audio rendering applications: digital bass boost, treble expander, stereo widening, FM radio acoustical performance improvement and other NXP software LifeVibes music algorithms. I For applications as USB (mobile)-phones hands-free teleconference stations: Full duplex acoustic echo cancellation, intelligibility improvement and other NXP software LifeVibes voice algorithms.
4. Applications
I USB headset I FM radio USB headset I Docking station
5. Ordering information
Table 1. Ordering information Package Name PNX0161ET/N101 TFBGA88 Description TFBGA88: plastic thin fine-pitch ball grid array package; 88 balls; body 7 x 7 x 0.8 mm Version SOT951-1 Type numbers
6. Marking
Table 2. Lines A B Marking codes Digits 0161ET/01 Comments Commercial name
Diffusion batch ID DBID and ASID /wafer ID Assy sequence ID ZPDYYWW1X Z = Fab. Location (SSMC) P = Assembly Factory (APC) D = Green product meeting RoHS (Lead and Halogen free) YYWW = date code 1 version = N1 version X = development status code (will change to `Y' for production.)
C
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PNX0161
PNX0161 personal audio IC
M347
A B1 B2 C
: 10 :7 :7 : 10
0
7
010aaa417
Fig 1. PNX0161 marking
7. Block diagram
RINGOSC
ARM7TDMI
CACHE 8kB M AHB MULTI-LAYER S S MMIO INTC S ROMI ROM 32kB S RAMI RAM 32kB S S S AHB2VPB3 ASYNC AUDIO_SYSCREG EMB FLASH 256kB SAO1 SAO2 SAI1 AHB2VPB0 ASYNC WATCHDOG PLL'S & OSC (C18X050M C18X032k C18PL160M C18PL550M) SYSCREG CGU IOCONF MICSUP EVENT ROUTER AHB2VPB1 ASYNC TIMER 1 TIMER 2 12CM/S USB 2.0 FS UART DAI AHB2VPB2 SYNC SA12 LNA PGA PGA PGA SDC SDC ADC DEC SDMA FC
PSU JTAG/TCB
FLASHCNTRL AUDIO SS SUBSYSTEM
M U DAO X M U INT SDAC X CLASS AB
010aaa407
ANVC
Fig 2. PNX0161 block diagram
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PNX0161 personal audio IC
8. Pinning information
8.1 Pinning
COILS/CAPACITORS SUPPLIES 12 PSU 2 MIC IN LINE IN OR FM RADIO IO CORE SUPPLY SUPPLY 4 IO/CORE IOCONF DAO IOCONF DAI 6
USB 4 USB 2.0FS PHY
FM RADIO 2 I2C MASTER/SLAVE
MICBIAS
4
IIS OUT
9 11
LNA/PGA/ADC DAC/HP
3
IIS IN
ANALOG OUT RESET CLOCK_OUT 32.768 kHz XTAL'S 12 MHz/ 32.768 kHz
2
IOCONF(8) CGU
8
MODE 0 MODE 1 PSU_STOP GPIO
8
OSC IOCONF
MULTI-ICE
6
JTAG/TCB
DAO FLASH
2 1
SUPPLY
010aaa415
Fig 3. PNX0161 pin configuration diagram Table 3. Pinning list GPIO BGA ball Digital I/O level Application function Pin state after reset input output input output Cell type[1] Description
BGA pin name
12 MHz oscillator (fixed 4 pins) XTALH_IN XTALH_OUT XTALH_VDDA18 XTALH_VSSA XTALL_IN XTALL_OUT XTALL_VDDA18 XTALL_GNDA I2C (fixed 2 pins) J1 H1 H2 K2 G1 F1 E2 G2 SUP2 SUP2 analog analog analog analog apio (Z) apio (IO) vddco vssco apio (Z) apio (IO) vddco vssco 12 MHz clock input 12 MHz clock output Analog supply oscillators Analog ground oscillators 32.768 kHz clock input 32.768 kHz clock output Analog supply oscillators/PLLs Analog ground oscillators/PLLs
32.768 kHz oscillator (fixed 4 pins)
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PNX0161 personal audio IC
Table 3.
Pinning list ...continued GPIO BGA ball Digital I/O level Application function Pin state after reset input input Cell type[1] Description
BGA pin name
I2C_SDA I2C_SCL
-
C13 C12
0-5 VDC tolerant 0-5 VDC tolerant SUP1 0-5 VDC tolerant SUP1 SUP1 SUP3 SUP2 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant
input/output input/output
iic3m4sdat5v iic3m4sdat5v
Serial data I2C Serial data I2C
USB interface (fixed 4 pins) USB_VBUS A13 B13 A12 A11 N9 N12 M13 N10 M9 M10 N11 N13 L12 M11 L13 K13 J13 G12 H13 G13 H12 analog analog analog analog analog input/output input/output input/output input/output input/output input output input input input input input input input bpts5ptpht5v bpts5ptpht5v usb 11f1 usb 11f1 vddcobf vddcobf vddcobf vddco vssco vssco vddco vddcobf vssco vssco apio apio bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v USB supply detection Soft connect output USB 2.0 FS Positive USB data line Negative USB data line USB supply voltage USB supply voltage DCDC1 3.3 V output voltage Connection to DCDC1 external coil (PSU_LX1) Ground for DCDC1 Nswitch (no substrate) Ground for DCDC2 Nswitch (no substrate) Connection to DCDC2 3 external coil (PSU_LX2) DCDC1 1.4 V output voltage Reference circuit ground not connected to substrate Core ground and substrate Play button input Stop button input General purpose IO pin MODE0 (pull-down)[2] General purpose IO pin MODE1 (pull-down)[3] General purpose IO pin STOP General purpose IO pin General purpose IO pin USB_CONNECT_N USB_DP USB_DM PSU (fixed 12 pins) PSU_VBUSA PSU_VBUSB PSU_VOUT33 PSU_LX_VOUT33 PSU_VSS1 PSU_VSS2 PSU_LX_VOUT14 PSU_VOUT14 PSU_CLEAN PSU_GND PSU_PLAY PSU_STOP GPIO (fixed 8 pins) GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 Yes Yes Yes Yes Yes -
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PNX0161 personal audio IC
Table 3.
Pinning list ...continued GPIO BGA ball Digital I/O level Application function Pin state after reset input input input Cell type[1] Description
BGA pin name
GPIO_5 GPIO_6 GPIO_7 DAI (fixed 3 pins) DAI_DATA DAI_WS DAI_BCK DAO (fixed 4 pins) DAO_DATA DAO_WS DAO_BCK DAO_CLK UART (fixed 2 pins) UART_TXD UART_RXD CGU (fixed 2 pins) RSTN_IN CLK_OUT
Yes Yes Yes
F13 F12 E13
0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant SUP2
input/output input/output input/output
bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v
General purpose IO pin General purpose IO pin General purpose IO pin
Yes Yes Yes
N1 N4 N6
input/output input/output input/output
input (GPIO) input (GPIO) input (GPIO) input (GPIO) input (GPIO) input (GPIO) input (GPIO) input (GPIO) input (GPIO) input output
bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v
I2S in data I2S in wordselect I2S in bit clock
Yes Yes Yes Yes
N7 M7 M6 N5
input/output input/output input/output input/output
bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v
I2S out data I2S out wordselect I2S out bit clock I2S out clock 256 FS
Yes Yes
K12 J12
input/output input/output
bpts5ptpht5v bpts5ptpht5v
Serial output Serial input[4]
Yes
K1 J2
input input/output
bpts5ptpht5v bpts5ptpht5v
System reset input (active low pull-up) 32.768 kHz clock output
Embedded flash (fixed 1 pin) FLASH_VDD_HV NA E12 vddco bpts5ptpht5v Supply Duty cycle measurement Not visible on package Not visible on package Not visible on package
-
-
-
-
bpts5ptpht5v
Address count up (pull-down) Sense amp trip point
-
-
-
-
apio (IO)
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PNX0161 personal audio IC
Table 3.
Pinning list ...continued GPIO BGA ball Digital I/O level Application function Pin state after reset Cell type[1] Description
BGA pin name
-
-
Not visible on package Not visible on package Not visible on package Not visible on package B10 A9 B9 A5 A7 B5 A8 B6 B6 B7 B7 A6 B8 SUP3 AI AI AO AO AI AI Supply Supply Ground Ground AO AO AI
-
apio (ZI)
Measure trip point current for sense amps Overrule write and erase security and protections (pull-down) Observe or supply positive write/erase voltage (11.5 V) Observe or supply negative write/erase voltage (5.5 V) SDAC analog supply SDAC positive reference voltage SDAC negative reference voltage Headphone left output Headphone right output Headphone filter capacitor left Headphone filter capacitor right Headphone analog supply class-AB Double bonding Headphone analog ground Double bonding Headphone common output reference Class-AB Analog reference supply For headphone and DAC ADC microphone input ADC line input left ADC line input right ADC reference voltage output ADC negative reference voltage
-
-
-
-
bpts5ptpht5v
-
-
-
-
VPEX
-
-
-
-
VNEX
DAC/HP (fixed 11 pins) DAC_VDDA33 DAC_VREFP DAC_VREFN HP_OUTL HP_OUTR HP_FCL HP_FCR HP_VDDA33 HP_GNDA HP_OUTC HP_VREF vddco apio apio apio apio apio apio vddco vddco vssco vssco apio apio apio
ADC/MIC (fixed 9 pins) ADC_MIC ADC_VINL ADC_VINR ADC_VREF ADC_VREFN A4 A2 A1 B1 C2 AI AI AI AO AI apio apio apio apio apio
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PNX0161 personal audio IC
Table 3.
Pinning list ...continued GPIO BGA ball Digital I/O level Application function Pin state after reset input input input input input output Cell type[1] Description
BGA pin name
ADC_VREFP ADC_VDDA18 ADC_VDDA33 ADC_GNDA MIC_VREFSUP MIC_OUTSUP JTAGSEL_ARM JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TRST_N JTAG_TDO
-
A3 D1 C1 D2 B4 B3 M3 M4 N2 N3 M1 M5
AI Supply Supply Ground AI AO 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant 0-5 VDC tolerant SUP3 SUP3 SUP3 SUP2 SUP2 -
input input input input input input/output
apio vddco vddco vssco apio apio bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v bpts5ptpht5v
ADC positive reference voltage ADC digital voltage supply ADC analog voltage supply ADC analog ground MIC clean reference voltage MIC supply voltage JTAG selection ARM (pull-down) JTAG data input (pull-up) JTAG clock input (pull-up) JTAG mode select input (pull-up) JTAG reset input (pull-down) JTAG data output
MicSUP (fixed 2 pins)
Debugging (fixed 6 pins)
Supplies (fixed 10 pins) VDDE0 VSSE0 VDDE1 VSSE1 VDDE2 VSSE2 VDDI0 VSSI0 VDDI1 VSSI1 Not used Not used Not used Not used
[1] [2]
-
E1 F2 N8 M8 D13 D12 L1 L2 A10 B11 B2 B12 M2 M12
-
-
vdde3v3 vsse3v3 vdde3v3 vsse3v3 vdde3v3 vsse3v3 vddco vssco vddco vssco -
Peripheral supply Peripheral ground Peripheral supply Peripheral ground Peripheral supply Peripheral ground Core supply Core ground Core supply Core ground -
Unused BGA balls (4 pins)
Cell types are explained in Table 5. GPIO0 is a bootstrap MODE pin, for further details see application note on PNX0161.
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PNX0161 personal audio IC
[3] [4]
GPIO1 is a bootstrap MODE pin, for further details see application note on PNX0161. UART_TX is a bootstrap MODE pin, for further details see application note on PNX0161.
1 ADC_ VINR
2 ADC_ VINL
3 ADC_ VREFP
4 ADC_ MIC
5
6
7
8
9 DAC_ VREFP
10
11
12
13 USB_ VBUS
A
HP_OUTL
HP_OUTC
HP_OUTR
HP_FCR
VDDI1
USB_DM
USB_DP
A
B
ADC_ VREF
#N/A
MIC_ OUTSUP
MIC_ VREFSUP
HP_FCL
HP_ VDDA33
HP_GNDA HP_VREF
DAC_ VREFN
DAC_ VDDA33
VSSI1
#N/A
USB_ CONNECT_ N
B
C
ADC_V DDA33
ADC_ VREFN
I2C_SCL
I2C_SDA
C
D
ADC_ VDDA18
ADC_ GNDA
VSSE2
VDDE2
D
E
VDDE0
XTALL_ VDDA18
FLASH_ VDD_HV
GPIO_7
E
F
XTALL_ OUT
VSSE0
GPIO_6
GPIO_5
F
G
XTALL_ IN
XTALL_ GNDA
TFBGA88
GPIO_1
GPIO_3
G
H
XTALH_ OUT
XTALH_ VDDA18
GPIO_4
GPIO_2
H
J
XTALH_IN
CLK_OUT
UART_RXD
GPIO_0
J
K
RSTN_IN
XTALH_ VSSA
UART_TXD PSU_STOP
K
L
VDDI0
VSSI0
PSU_CLEAN PSU_PLAY
L
M
JTAG_ TRST_N
#N/A
JTAGSEL_ JTAG_TDI ARM
JTAG_TDO DAO_BCK
DAO_WS
VSSE1
PSU_VSS1 PSU_VSS2 PSU_GND
#N/A
PSU_ VOUT33
M
N
DAI_DATA
JTAG_TCK JTAG_TMS
DAI_WS
DAO_CLK
DAI_BCK
DAO_DATA
VDDE1
PSU_ VBUSA
PSU_LX_ VOUT33
PSU_LX_ PSU_VBUSB VOUT14
PSU_ VOUT14
N
1
2
3
4
5
6
7
8
9
10
11
12
13
010aaa416
Fig 4. Pinning diagram Table 4. SUP2 SUP3 Supply domains Typical voltage (V) 1.4 - 1.8 3.0 - 3.3 Related supply pins VDDI0, VDDI1, VDDA18 Description Core supply
Supply domain
VDDE0, VDDE1, VDDE2, Peripheral and analog ADC_VDDA33, supplies DAC_VDDA33, HP_VDDA33 PSU_VBUS USB VBUS voltage
SUP1
4.0 - 5.25
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Table 5.
Cell types Function Digital input/output Digital input/output Core supply Core supply Core supply Description Bidirectional pad; plain input; 3-state output; SSO control; CMOS with programmable hysteresis and repeater. IIC cell; clock signal; cell based ESD protection. An adapted VDDCO pad from library with the following modification:
Library name[1] bpts5ptpht5v bpts5ptpht5v apio vddco vddcobf vddco*
Analog input/output Analog pad; analog input/output.
* * * *
vddi vdde3v3 vssco vssis vsse3v3
[1]
Removing the capacitive coupled gate triggering of the gcNMOST protection between pad and substrate. Connect the gate to substrate. Add a P-diode between ggNMOST and pad. Add a N-diode between pad and substrate.
Core supply Peripheral supply Core ground Core ground Peripheral ground
-
The library name is the official name of the cell in the CMOS library. To increase readability, nicknames for the cells have been created for this document. Throughout this document, the nickname is used to refer to a certain cell type instead of its official name.
9. Limiting values
Table 6. Limiting values In accordance with the absolute maximum rating system (IEC 134) Symbol All digital I/Os VI VO IO Temperature values Tj Tstg Tamb Electrostatic handling VESD electrostatic discharge HBM, human body voltage mode CDM, charge, device mode -2000 500 +2000 V V junction temperature storage temperature ambient temperature 0 -40 -15 +25 125 +85 +70 C C C input voltage output voltage output current VDD(EXT) = 3.3 V -0.5 -0.5 4 +5.0 +3.6 V V mA Parameter Conditions Min Typ Max Unit
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10. Static characteristics
This chapter gives an overview of the most important static characteristics of the PNX0161. More detailed specifications will be given in future versions of this document.
Table 7. Symbol VDD(EXT) VDD(INT) VDDA(1V8) VDDA(3V3) VBUS Table 8. Symbol PO(VBUS) VO(3V3) VO(3V3) VO(1V4) VO(1V4) IO(3V3) IO(1V4) DCDC(33) DCDC(14) fclk fosc fsw Table 9. Symbol IDDA(ADC)(3V3) IDDA(ADC)(1V8) Iref(neg) Iref(pos) IDDA(SDC) IDDA(PGA) GPGA IDDA(bias) IDDA(LNA)
PNX0161_1
Static characteristics Parameter external supply voltage internal supply voltage Conditions <0,2 > <0..1 > Min 3.0 1.3 1.3 3.0 4.0 Typ 3.3 1.4 1.4 3.3 5.0 Max 3.6 1.95 1.95 3.6 5.25 Unit V V V V V
analog supply voltage 12 MHz XTAL osc/PLL (1.8 V) analog supply voltage (3.3 V) bus supply voltage Power supply unit static characteristics Parameter VBUS output power output voltage (3.3 V) output voltage variation (3.3 V) output voltage (1.4 V) output voltage variation (1.4 V) output current (3.3 V) output current (1.4 V) DC-to-DC converter efficiency (33 %) DC-to-DC converter efficiency (14 %) clock frequency oscillator frequency switching frequency Conditions -
Min 4.0 2.4 -50 1.3 -50 8 -
Typ 5 3.0 1.4 85 81 12 10 1
Max 5.25 3.2 +50 1.95 +50 50 50 12 -
Unit V V mV V mV mA mA % % MHz MHz MHZ
Analog in - electrical parameters DC characteristics Parameter ADC analog supply current (3.3 V) ADC analog supply current (1.8 V) negative reference current positive reference current SDC analog supply current PGA analog supply current PGA gain bias analog supply current LNA analog supply current Conditions N = 13 for all modules on Min Typ 2.2 20 20 0.4 430 -1.94 190 + N*10 0.85 Max 20 1.2 Unit mA mA A A mA A dB A mA
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Table 9. Symbol GLNA
Analog in - electrical parameters DC characteristics ...continued Parameter LNA gain Conditions in a bandwidth between 300 Hz and 5 kHz. headphone and DAC headphone Min 28 Typ 30 Max 32 Unit dB
Rref Rcom G
reference resistance common resistance gain mismatch
0
11.25 11.25 -
24
k k dB
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11. Dynamic characteristics
This chapter shows the audio performance characteristics of the PNX0161. A more extensive list of dynamic characteristics will be given in future versions of this document.
Table 10. Symbol fosc Ci Co tstart P Table 11. Symbol VO Po (THD+N)/S Timing and other characteristics Parameter oscillator frequency duty cycle input capacitance output capacitance start time power dissipation Conditions crystal level of drive Min 100 Typ 12 50 500 Max 2 0.74 500 Unit MHz % pF pF s W
12 MHz oscillator (XTALH)
Dynamic characteristics of Class AB amplifier at 3.0 V - DC mode[1] Parameter output voltage output power total harmonic distortion plus noise-to-signal ratio Conditions HP unloaded RL = 32 (measured with 20 kHz block filter) at 0 dBFS, fi = 1 kHz, RL = 32 at -60 dBFS, fi = 1 kHz, RL = 32 -35 96 6 -42 -30 dBA dBA dB dB Min Typ 830 -59 Max 2.5 Unit mVRMS mW dB
S/N ripple ct
signal-to-noise ratio ripple rejection crosstalk attenuation
HP unloaded (measured with 20 kHz block filter) RL = 32 at 0 dBFS, fi = 1 kHz, RL = 32
[1]
Tamb = 25 C; unless otherwise specified.
Table 12. Symbol B THD
Analog in - electrical parameters AC characteristics Parameter bandwidth total harmonic distortion Conditions at 48 kHz sampling rate THD+N @ 0 dBFS; fi = 1 kHz tuner, line input level = 1 V, PGA setting 0 dB THD+N @ -60 dBFS; fi = 1 kHz; A-weighted tuner, line imputatively = 1 mV, PGA setting 0 dB 30 dBA Min Typ -73 Max 21.7 Unit kHz dB
S/N Zi
signal-to-noise ratio input impedance
tuner, line imputatively = 1 V, PGA setting 0 dB; A-weighted line in/tuner mode
-
90 12
-
dBA k
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Table 12. Symbol
Analog in - electrical parameters AC characteristics ...continued Parameter total harmonic distortion Conditions THD+N @ 0 dBFS Vi mic = 20 V; fi = 1 kHz THD+N @ -60 dBFS; A-weighted Vi mic = 20 V; fi = 1 kHz 31 dBA Min Typ -70 Max Unit dB
Microphone THD
Zi Table 13. Symbol fARM Table 14. Symbol Istb(susp) P
input impedance
-
-
5
-
k
Digital - electrical parameters AC characteristics Parameter ARM frequency Power figures Parameter suspend mode standby current power dissipation Conditions playback: by the headphones of a received USB audio stream from USB host via the DAC. Min Typ 750 45 Max Unit A mW Conditions Min Typ Max 48 Unit MHz
* * *
Vbus = 5 V VO(1V4) = 1.46 V VO(3V3) = 3.0 V
DC-coupled (HP 32 ) output power adjusted to 0,5 mW using 1 kHz sine wave. normalized test MP3 file is used, tin arena, chains. playback volume: maximum volume in volume control, Vol = 35 in media player recording: audio stream converted by the ADC from the microphone is sent via USB audio stream to the USB host. 53 mW
* * *
Vbus = 5 V VO(1V4) = 1.46 V VO(3V3) = 3.0 V
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Table 14. Symbol P
Power figures ...continued Parameter power dissipation Conditions phone call: in addition to the first case, simultaneously returning a USB audio stream that is converted by the ADC from the microphone. The microphone is mixed to the headphone stream, known as side-tone mixing. Min Typ 72 Max Unit mW
* * *
Vbus = 5 V VO(1V4) = 1.46 V VO(3V3) = 3.0 V 80 mW
DC-coupled (HP 32 ). tuner listening: the FM tuner audio stream is sent to the headphones. No stream is sent or received via USB. tuner recording: the FM tuner audio stream is sent to the headphones. In addition the FM tuner stream is streamed to the phone via USB. THD+N @ 0 dBFS; fi = 1 kHz. Pmax maximum power dissipation phone UC + max freq SYSBASE at 48 MHz and MAX volume.
-
117
-
mW
-
172
-
mW
Table 15. Symbol fbit(UHCI)
DFU downloading Parameter UHCI bit rate Conditions limited by a USB control end point size of 8 bytes measured with 2 kB transfer. 2 kB transfer Min Typ 8 Max Unit kB
fbit(OHCI)
OHCI bit rate
-
77
-
kB
PNX0161_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 17 January 2008
16 of 21
NXP Semiconductors
PNX0161
PNX0161 personal audio IC
12. Package outline
TFBGA88: plastic thin fine-pitch ball grid array package; 88 balls; body 7 x 7 x 0.8 mm SOT951-1
D
B
A
ball A1 index area
E
A
A2 A1
detail X
e1 e b
C v w
M M
CAB C
y1 C
y
N M L K J H G F E D C B A
e
e2
ball A1 index area
1
2
3
4
5
6
7
8
9 10 11 12 13
X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max 1.1 A1 0.25 0.15 A2 0.85 0.75 b 0.35 0.25 D 7.1 6.9 E 7.1 6.9 e 0.5 e1 6 e2 6 v 0.15 w 0.05 y 0.08 y1 0.1
OUTLINE VERSION SOT951-1
REFERENCES IEC --JEDEC MO-195 JEITA ---
EUROPEAN PROJECTION
ISSUE DATE 06-05-26 06-08-25
Fig 5. Package outline SOT951-1 (TFBGA88)
PNX0161_1 (c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 17 January 2008
17 of 21
NXP Semiconductors
PNX0161
PNX0161 personal audio IC
13. Abbreviations
Table 16. Acronym ADC ADSS AHB AVC CGU Class-AB DAC DAI DAO DMA ESD GPIO INTC IOCONF ISRAM ISROM I2C M/S JTAG PHY PLL PSU SAI SAO SDAC SDMA SysCReg Timer UART USB 2.0 FS VPB VPB bridge VSLI Watchdog / WDOG Abbreviations Description Analog to Digital Converter AuDio SubSystem Advanced Peripheral Bus Analog Volume Control Clock Generation Unit Class-AB headphone amplifier Digital to Analog Converter Digital Audio Input Digital Audio Output Direct Memory Access ElectroStatic Discharge General Purpose Input/Output INTerrupt Controller Input Output CONFiguration Internal RAM Memory Internal ROM memory Inter IC Communication Master/Slave interface Joint Test Action Group PHYsical layer Phase Locked Loop Power Supply Unit Simple Audio Input Simple Audio Output Stereo Digital to Analog Converter Simple Direct Memory Access controller System Control Registers Timer module Universal Asynchronous Receiver Transmitter Universal Serial Bus 2.0 Full-Speed device VSLI Peripheral Bus AHB to VPB bridge Very Large Scale Integration Watchdog timer
PNX0161_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 17 January 2008
18 of 21
NXP Semiconductors
PNX0161
PNX0161 personal audio IC
14. Revision history
Table 17. Revision history Release date 20080117 Data sheet status Product data sheet Change notice Supersedes Document ID PNX0161_1
PNX0161_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 17 January 2008
19 of 21
NXP Semiconductors
PNX0161
PNX0161 personal audio IC
15. Legal information
15.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
15.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Nexperia -- is a trademark of NXP B.V.
16. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
PNX0161_1
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 -- 17 January 2008
20 of 21
NXP Semiconductors
PNX0161
PNX0161 personal audio IC
17. Contents
1 2 3 3.1 3.2 3.3 3.4 4 5 6 7 8 8.1 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General features . . . . . . . . . . . . . . . . . . . . . . . . 1 Hardware features . . . . . . . . . . . . . . . . . . . . . . 1 Software features . . . . . . . . . . . . . . . . . . . . . . . 2 Software features on request . . . . . . . . . . . . . . 2 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 11 Static characteristics. . . . . . . . . . . . . . . . . . . . 12 Dynamic characteristics . . . . . . . . . . . . . . . . . 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 20 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information. . . . . . . . . . . . . . . . . . . . . 20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 17 January 2008 Document identifier: PNX0161_1

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